IMAGE SENSOR & IP-CORE EVALUATION

 

With a compact form factor designed to fit into available camera housings and capable of supporting two sensors simultaneously, the Kit enables rapid evaluation and prototyping of high-definition HDR video cameras for especially the embedded vision market. Schematics and layout files are available free to all purchasers, further accelerating time to market. 

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The hardware is designed to support full 1080p resolution at 60 frames per second in streaming mode through the FPGA, without the need for any external frame buffer.

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POWERED BY IONOS IP CORES

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The integrated 'IONOS' Image Signal Processing (ISP) IP pipeline from Helion, provides end-to-end ISP support from sensor to displayable image. The ISP pipeline is available in different styles, just choose the one that fits best for your application.