FPGA Processing Boards
With the Lattice ECP2M-50 FPGA, the platform is powerful enough to generate 1080p30 resolution. For 1080p60 resolution please see also the Lattice HDR-60 Camera Development Kit, which uses a Lattice ECP3-70 FPGA.
All FPGA units can be programmed via E2C interfaces. The ISP (Image Signal Processing) is supported trough Helion's own ISP-Suite. In our Suite you will find nearly all IP-Cores for image processing, like Debayer, Defective Pixel Correction, Automatic White Balancing, etc. If you need support during the development phase, you can also add our support packages to speed up this efficient fast-time to market development kit.