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IONOS
IMAGING IP CORES
Helion offers a comprehensive selection of video pipelines, ranging from basic to advanced monochrome and color pipelines, all the way through high resolution advanced High Dynamic Range Imaging (HDRI) color pipelines.
SIMPLIFIED CAMERA ARCHITECTURE

- Free Evaluation
- Easy Licensing
- Comprehensive IP-Suite
- Reference Designs available
IMAGING IP CORES
Movie

Depending on the pipeline selected, it will consist of a number of individual video processing IP cores, such as defective pixel correction, logic-efficient 3 x 3 De-Bayering, high quality 5 x 5 De-Bayering, color-correction matrix, gamma correction, auto-exposure, auto-white balance and more. These cores also support Lattice FPGA devices, and are all compatible and simply connected with the Wishbone bus.
VESTA TECHNOLOGY PLATFORM & IONOS IMAGING ISP CORES
FPGA Processing Boards & ISP Pipeline
Available Solutions from Helion:
- NanoVesta Headboards (Hardware)
- HiSPi, subLVDS, Parallel
- Companion Bridge Chip
Image Sensor Boards & Sensor Port
Interface Boards & Output
Available Solutions from Helion:
- Interface Boards (Hardware)
- DVI, SDI,Cameralink, DSP (BT1120, BT656, YUV420P)
Available Solutions from Helion:
- Processing Boards (Hardware)
- Complete ISP pipeline
- MF / AF (Manual- /Autofocus)
- OIS (Optical Image Stabilization)

The image demonstrates the signal path of the IONOS IP CORES in an imaging system.This imaging pipeline is also the integrated demo-pipeline in the Lattice HDR-60 Camera Development Kit, that is already implemented by purchasing this evaluation product.
A big advantage is that the ISP pipeline requires no external frame buffer and the low power consumption of the Lattice ECP3 FPGAs makes cameras based on the HDR-60 extremely low cost to build and operate. The hardware supports up to 16-megapixel sensors, it can support up to 2 sensors simultaneously and is easily programmable via standard low-cost USB cable.
